=== ================================ === === Bit – Compare memory bits with A === === ================================ === Format 001.bbb.00,100.010.01 Description The logical AND of A and M is performed, but not stored. The result of the comparision is indicated by Z. Z=1 if the comparison fails; 0 otherwise. In addition, bits 6 and 7 of the data is transferred into V and N of the status register. It does not modify the contens of A. Addressing Modes ┌─────────┬────────────┬──────────┬─────────────┬─────┬─────┬────────────────┬────────────────┐ │ *imm* │ 100.010.01 │ 89 ab │ Bit #ab │ --- │ #2 │ 1000.0001 = 81 │ 0000.1000 = 08 │ │ Zpg │ 001.001.00 │ 24 ab │ bit ab │ bbb │ #3 │ 0010.0000 = 20 │ 0000.0100 = 04 │ │ Abs │ 001.011.00 │ 2c cd ab │ bit abcd │ bbb │ #4 │ 0010.0000 = 20 │ 0000.1100 = 0c │ │ *zpx* │ 001.101.00 │ 34 ab │ Bit aa,x │ bbb │ #4? │ 0010.0000 = 20 │ 0001.0100 = 14 │ │ *abx* │ 001.111.00 │ 3c cd ab │ Bit abcd,x │ bbb │ #4? │ 0010.0000 = 20 │ 0001.1100 = 1c │ └─────────┴────────────┴──────────┴─────────────┴───────────┴────────────────┴────────────────┘ Flags NV-BDIZC 76- •
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Letzte Aktualisierung: 2017-02-23